ReRAM-Based Machine Learning by Yu Hao;Ni Leibin;Pudukotai Dinakarrao Sai Manoj;

Author:Yu, Hao;Ni, Leibin;Pudukotai Dinakarrao, Sai Manoj;
Language: eng
Format: epub
Publisher: Institution of Engineering & Technology
Published: 2021-03-11T16:00:00+00:00

6.1.1.4 Step 4. Adding and shifting for inner-product result

The output of encoding step is in binary format, but some processes are needed to obtain the final inner-product result (Figure 6.2). Adder and shifter are designed to complete this process as shown in Figure 6.1(d). Let us consider the original data are 8-bit and data dimension is , the workload of adder is without any acceleration for the purpose of illustration. With four-step ReRAM-crossbar accelerator as preprocessing, the workload of adder can be significantly reduced to ().

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